This invention relates generally to digital encoding of electrical signals, and in particular, provides apparatus for high-resolution analog-to-digital conversion of electrical signals. While applicable to seismic and other dynamic waveform signals, the invention relates also to analog-to-digital encoders used in other applications, and to techniques of high-resolution analog-to-digital conversion in general.
Digital encoding of seismic, sonar, audio, vibrations and other types of broad-band physical signals requires a large dynamic range, greater than 120 dB, extremely low differential non-linearity (often less than a fraction of a part-per-million), and well-defined phase and group delay. Seismic waveforms, for example, comprise a large dynamic range, greater than 140 dB, and frequency content, more than 5 decades. These signals typically do not, however, require commensurate absolute accuracy of the zero-frequency full scale.
Progress has been made in prior-art analog-to-digital encoding devices employing delta sigma modification to achieve high linearity. Improvements over early devices have produced higher loop gain within the desired signal passband by incorporating integrators or low-pass filters within the delta-modulator feedback loop, thus creating a delta-sigma modulator. For a given bit rate, the additional loop gain increases the information content in the delta-modulated serial bit-stream output at frequencies within the signal passband. Double, triple, and higher order implementations of the delta-sigma modulator are used. The following U.S. patents disclose examples of such systems:
______________________________________ 3,825,831 Ishiguro 4,313,204 DeFreitas 4,509,037 Harris 4,518,948 VanRoessel 4,542,354 Robinton et al. 4,573,037 Robinton et al. 4,588,981 Senn ______________________________________
The Ishiguro patent discloses differential pulse code modulation apparatus including a delta modulator for converting an analog input signal to a delta modulated signal, a digital filter for removing quantization noise components, and a direct feedback pulse code modulation encoder.
The DeFreitas patent discloses apparatus for generating a digitally encoded signal from an analog signal and a reference signal, including a circuit for reducing quantization noise.
The Harris patent discloses an analog-to-digital encoder including a delta modulation encoder. An analog signal and an internal analog signal generated by an internal decoder are summed to provide an internal analog error signal. The encoder also includes a spectrum tilter having at least three integrator circuits and a clipping circuit connected in parallel to two of the three integrator circuits.
The VanRoessel patent discloses an analog-to-digital converter including a series arrangement of an integrating circuit, a comparison circuit, a flip-flop and a gate.
The Robinton ('354) patent discloses a delta-sigma pulse modulator for converting an input signal to an output pulse train having an average amplitude proportional to the input signal. The modulator includes an integrator/comparator circuit.
The Robinton ('037) patent discloses an analog-to-digital converter including an integrator, a comparator, and digital gates for receiving and processing an analog input signal.
The Senn patent discloses a double integration, delta-sigma analog-to-digital converter including first and second adders, first and second integrators, a quantizer circuit, operational amplifiers and switched capacitor circuits.
The above patents accordingly describe apparatus for converting analog input signals to digital output signals. However, prior-art analog-to-digital converters (ADCs) comprising a delta-sigma modulator have a variety of operational deficiencies such as noise and limited dynamic range.
A double-integrator delta-sigma modulator, although an improvement relative to a single-integrator version or a simple delta modulator, requires a loop bit rate on the order of 1000 times the highest signal frequency to achieve 120-140 dB dynamic range. In a converter employing delta-sigma modulation, the loop bit rate should ideally be as low as possible relative to the highest processed signal frequency for several reasons.
In particular, semiconductor analog switches such as Field Effect Transistors (FETs) that are used within the delta-sigma modulator loop introduce errors, essentially noise, because of charge injection each time the switch is operated. The error due to charge injection is proportional to the switching frequency. The number of switchings per unit time, and therefore the loop bit rate, relative to the highest signal frequency should therefore be minimized. Charge injection errors are a principal limitation in delta- and delta-sigma modulators having high dynamic range.
Moreover, a lower loop bit rate demands less numerical computation per unit time in digital filters or other processors receiving the output of the delta-sigma modulator. The time duration of the impulse response of a digital filter associated with a delta-sigma modulator is proportional to a function of the ratio of loop bit rate to highest signal frequency. The time duration of a subsequent digital filter is also proportional to the required degree of suppression by the filter of undesired signals. In particular, the single-bit output of a delta modulator class of device has a large granularity, essentially quantization noise, at the loop bit rate frequency. A digital filter may be used to reduce this noise within the desired signal passband, although to achieve 120-140 dB of dynamic range requires a substantial 120-140 dB of suppression, and an accordingly long filter duration. Excessive group delay accompanying a filter with long duration may, for example, preclude application of the ADC within a closed-loop servo control system, or other real-time application.
A triple, or higher order, delta-sigma modulator has a relatively high information content in the output serial bit stream for a given loop bit rate, but requires some means to suppress meta-stable or unstable oscillation of the delta-sigma feedback loop. Such a high-order loop, in general, violates the Nyquist criterion for stability, and has required, in prior-art devices, a non-linear device that reduces the feedback loop gain momentarily when oscillations increase. This introduces noise within the signal passband, since the delta-sigma loop order is effectively reduced to order 1 or 2, although the loop bit rate remains constant. Furthermore, such a meta-stable loop must be operated with maximum signal levels significantly below the nominal full scale range of the loop so that non-linear loop stabilization is not required frequently. Such operation, however, sacrifices dynamic range for a given implementation.
Additionally, these characteristics of delta-sigma modulation indicate that for a given loop bit rate, the technique requiring the lowest ratio of loop bit rate to maximum signal frequency provides the highest conversion rate. Because actual circuit performance and thus potential fields of application are limited by analog switch charge injection, digital computation rate and digital filter duration, maximum conversion rate and resolution, which is required in applications such as sonar and ultrasound imaging, digital studio audio, vibration analysis, and precision instrumentation, can be achieved only by the technique requiring the lowest relative loop bit rate.
There accordingly exists a need for high-resolution analog-to-digital conversion apparatus characterized by large amplitude and frequency range and low differential non-linearity.
It is thus an object of the invention to provide improved analog-to-digital converter (ADC) apparatus for converting analog input signals to digital output signals.
It is another object of the invention to provide ADC apparatus which is capable of processing signals having a large dynamic range and frequency content.
It is a further object of the invention to provide ADC apparatus having extremely low differential non-linearity, precisely-defined phase delay and minimal group delay.
It is yet another object of the invention to provide ADC apparatus which is suitable for use in processing seismic, audio and other analog signals.
Other general and specific objects of the invention will in part be obvious and will in part appear hereinafter.